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How to use extensions of RISC-V in OpenCL code? #685

@TJU-PanYizhe

Description

@TJU-PanYizhe

Version

4.0.0

What is your question or problem?

I compiled oneapi-construction-kit on my RISC-V CPU hardware using command below:

cmake -GNinja \
   -Bbuild-riscv \
   -DCA_LLVM_INSTALL_DIR=/usr/lib/llvm-18 \
   -DCA_ENABLE_HOST_IMAGE_SUPPORT=OFF \
   -DCA_CL_ENABLE_ICD_LOADER=ON \
   -DCMAKE_C_COMPILER=clang-18 \
   -DCMAKE_CXX_COMPILER=clang++-18
ninja -C build-riscv install -j32

After set ICD file under /etc/OpenCL/vendors/, clinfo and sycl-ls can both find the RISC-V CPU as an OpenCL device.

Image

Now this RISC-V CPU can ran OpenCL code. Here is one of the OpenCL kernel I tried:

__kernel void hello_kernel(__global const float *a,
	__global const float *b,
	__global float *result)
{
	int gid = get_global_id(0);
 
	result[gid] = a[gid] + b[gid];
}

I compiled the kernel above with ocl and disassembled the output with llvm-objdump using the command:

clc --strip-binary-header -o HelloWorld.o HelloWorld.cl -cl-wfv=never -d riscv64
llvm-objdump --disassemble --triple=riscv64 --mattr="v,c,zbc" HelloWorld.o > HelloWorld.txt

There aren't any RISC-V V Extention Assembly Code in HelloWorld.txt though RVV is supported on my RISC-V CPU.

  • How to use any of the RISC-V Extention in OpenCL when run OpenCL code on a RISC-V CPU?
  • Is it correct that OpenCL code is translated into LLVM IR and processed by Clang to generate the binary in this scenario that RISC-V CPU is regarded as the OpenCL device?

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