🛠️ Custom Assembler & Simulator

A Python-based CLI toolset that implements a RISC-style Instruction Set Architecture (ISA) through a custom assembler and simulator. This project demonstrates low-level computer architecture concepts and instruction set emulation by converting human-readable assembly instructions to binary and simulating their execution.

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📅 Timeline

May 2023 – June 2023

📌 Features

✅ Assembler

• Converts over 20 standard RISC assembly instructions into machine code.
• Parses .txt or .asm files, performs robust syntax validation, and emits error messages for invalid instructions.
• Supports label resolution, memory addressing, and binary code generation.

✅ Simulator

• Reads binary files generated by the assembler and simulates actual instruction execution.
• Tracks the state of:
  • 6 General-Purpose Registers (R0–R5)
  • Program Counter (PC)
  • Flag Register (for conditions like overflow, zero, etc.)
• Implements cycle-accurate behavior and error handling for invalid operations.

✅ Extensions to RISC ISA

• Introduced 5 custom instructions to extend the basic RISC ISA:
  • pow – Register-wise exponentiation
  • inc – Increment a register
  • clr – Clear a register
  • mod – Modulo operation
  • abs – Absolute value

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🚀 Technologies Used

Category	Technology
Language	Python
Architecture	RISC ISA (Custom)
CLI	File I/O, Argument Parsing
Testing	Automated Grader with Input Traces
Design Paradigm	Modular CLI Tooling

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📂 Directory Structure Overview

nikhil190804-python_based_assembler_and_simulator/
├── Assembler.py               # Main assembler script
├── Simulator.py               # Main simulator script
├── automatedTesting/          # Grading + test framework
│   ├── src/                   # Test runner & utilities
│   └── tests/                 # Assembly inputs and trace comparison
├── Simple-Assembler/          # Alternate version of the assembler
├── SimpleSimulator/           # Alternate version of the simulator
└── README.md

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🧪 Testing

• Over 30 test cases for:
  • Valid instructions (simpleBin, hardBin)
  • Error generation (errorGen)
  • Output comparison via binary + trace files
• Custom AsmGrader.py and SimGrader.py scripts to automate test execution and output validation.

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🖥️ How to Run

🧩 Assembler

python Assembler.py < input_file.asm > output_file.bin

🔁 Simulator

python Simulator.py < output_file.bin > output_trace.txt

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📈 Learning Outcomes

• Designed a complete instruction set using custom opcodes.
• Understood how compilers/assemblers work under-the-hood.
• Gained insight into CPU micro-operations, register simulation, and instruction encoding.
• Applied file I/O, command-line parsing, error handling, and automated testing.

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🤝 Contributions

All contributions are welcome! Please create a PR or raise an issue to contribute test cases or ISA enhancements.