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Updated documentation for adaq4224 and adaq4216 #1875

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Updated documentation for adaq4224 and adaq4216 #1875

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@ladace ladace commented Aug 11, 2025

PR Description

Updated documentation for adaq4224 and adaq4216

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

@ladace ladace self-assigned this Aug 11, 2025
@ladace ladace added the doc label Aug 11, 2025
@ladace ladace requested a review from LBFFilho as a code owner August 11, 2025 11:59
IuliaCMoldovan
IuliaCMoldovan requested changes Aug 21, 2025
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  • Link the available device trees for these chips
  • Update the READMEs as well

@ladace ladace requested a review from sarpadi as a code owner September 23, 2025 09:13
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ladace commented Sep 23, 2025

V0:

  • Fixed comments and updated READMEs

@ladace
docs: ad4630_fmc: Added ADAQ4224 and ADAQ4216 uModule documentation
96991b6 
Signed-off-by: Liviu 'Ceshu' Adace <liviu.adace@analog.com>
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ladace commented Sep 23, 2025

V1:

  • Resolved conflicts and rebased to main

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ladace commented Sep 23, 2025

V2:

  • Fixed NO_REORDER build example (cannot have DDR_EN=1 in spi mode)

IuliaCMoldovan
IuliaCMoldovan requested changes Sep 23, 2025
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projects/ad4630_fmc/README.md Outdated
Comment on lines 18 to 22
| [AD4030](https://www.analog.com/en/products/ad4030-24.html) | 24-Bit, 2 MSPS, Single Channel SAR ADC |
| [AD4630](https://www.analog.com/en/products/ad4630-24.html) | 24-Bit, 2 MSPS, Dual Channel, Precision Differential SAR ADC |
| [AD4632](https://www.analog.com/en/products/ad4632-24.html) | 24-Bit, 500 kSPS, Dual Channel SAR ADC |
| [ADAQ4216](https://www.analog.com/en/products/adaq4216.html) | 16-Bit, 2 MSPS, μModule Data-Acquisition Solution |
| [ADAQ4224](https://www.analog.com/en/products/adaq4224.html) | 24-Bit, 2 MSPS, μModule Data Acquisition Solution |
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Revert this change

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Fixed

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ladace commented Sep 23, 2025

V3:

  • Fixed remark with links in README

@ladace
projects: ad4630_fmc: Updated READMEs
a8964f4 
Updated parts and boards, fixed NO_REORDER parameter build example
(cannot have DDR_EN in spi mode)

Signed-off-by: Liviu 'Ceshu' Adace <liviu.adace@analog.com>
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@gastmaier gastmaier Awaiting requested review from gastmaier gastmaier is a code owner

@StancaPop StancaPop Awaiting requested review from StancaPop StancaPop is a code owner

@LBFFilho LBFFilho Awaiting requested review from LBFFilho LBFFilho is a code owner

@sarpadi sarpadi Awaiting requested review from sarpadi sarpadi is a code owner

@IuliaCMoldovan IuliaCMoldovan Awaiting requested review from IuliaCMoldovan IuliaCMoldovan is a code owner

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