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fpga-programming

Here are 339 public repositories matching this topic...

JulianKemmerer / PipelineC

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

python c fpga hls hardware vhdl pipelines open-source-hardware high-level-synthesis hardware-description-language fpga-accelerators fpga-acceleration fpga-programming hardware-description

Updated Oct 25, 2025
VHDL

Vitis_Accel_Examples

Xilinx / Vitis_Accel_Examples

Vitis_Accel_Examples

zynq xilinx soc alveo fpga-programming acap vitis

Updated Aug 15, 2025
Makefile

calyx

calyxir / calyx

Intermediate Language (IL) for Hardware Accelerator Generators

compiler open-source-hardware intermediate-language high-level-synthesis fpga-programming

Updated Nov 5, 2025
Rust

cornell-zhang / heterocl

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)

python fpga compiler dsl high-level-synthesis accelerators fpga-programming

Updated Apr 20, 2024
Python

cornell-zhang / allo

Allo: A Programming Model for Composable Accelerator Design

asic fpga compiler hardware dsl adl high-level-synthesis fpga-programming

Updated Nov 5, 2025
Python

Awesome-Retro-Docs

TinyRetroWarehouse / Awesome-Retro-Docs

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

Updated Mar 5, 2021

cucapra / dahlia

Time-sensitive affine types for predictable hardware generation

open-source-hardware high-level-synthesis fpga-programming dahlia

Updated Nov 5, 2025
Scala

pc2 / sus-compiler

A new Hardware Design Language that keeps you in the driver's seat

programming-language tree-sitter fpga hdl hardware-description-language fpga-programming

Updated Nov 5, 2025
Rust

amaranth-farm / amlib

assorted library of utility cores for amaranth HDL

fpga fpga-programming nmigen amaranth-hdl

Updated Sep 17, 2024
Python

cornell-zhang / HiSparse

High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS

open-source-hardware high-level-synthesis fpga-programming sparse-linear-algebra

Updated Sep 27, 2024
C++

psychogenic / riffpga

riffpga -- write FPGA bitstreams through a USB drive, get USB serial and dynamic clocking in a platform independent way

fpga fpga-programming fpga-projects

Updated Feb 27, 2025
C

sdk-docker-fpga

raetro / sdk-docker-fpga

Intel Quartus Prime Synthesis Engine for Docker

docker workflow fpga intel ci-cd mister fpga-soc mist jtag cyclone-iv cyclone-v quartus mimic max10 cyclone-10lp fpga-programming sidi cyclone-iii

Updated Feb 19, 2024
Dockerfile

cornell-zhang / GraphLily

A graph linear algebra overlay

graph-processing open-source-hardware high-level-synthesis fpga-programming

Updated Apr 26, 2023
C++

cornell-zhang / hcl-dialect

HeteroCL-MLIR dialect for accelerator design

fpga compiler intermediate-representation open-source-hardware high-level-synthesis fpga-programming

Updated Sep 18, 2024
C++

Hello-FPGA / BISS-C

This is BISS-C FPGA IP and It's Driver Repo

fpga sensors-data-collection fpga-programming

Updated Nov 13, 2023
Tcl

verilog-rle

geraked / verilog-rle

Verilog Implementation of Run Length Encoding for RGB Image Compression

Updated Jun 28, 2021
Verilog

akangakang / OS-ChCore-Lab

上海交通大学软件学院🍭操作系统课程🍦实验

cpu fpga-programming

Updated Jun 25, 2021
C

FPGA_HW_SIM_FWK_2

ClarkFieseln / FPGA_HW_SIM_FWK_2

FPGA Hardware Simulation Framework

python windows emulator api simulator fpga simulation emulation vhdl windows-10 python3 python-3 windows10 hdl vhdl-code pygubu fpga-programming windows-11 pygubu-designer

Updated Oct 13, 2025
Python

2268977258 / binocular-stitching

基于易灵思Ti60F225开发板和MT9M001双目摄像头，使用Verilog语言完成的双目拼接项目。摄像头输入图像数据后，在使用FAST计算图像特征点的同时，构建滑动窗口计算图像各个像素点的BRIEF描述符，完成后根据BRIEF描述符对两幅图像上的特征点进行暴力匹配，最后通过匹配结果计算拼接参数，完成图像的拼接。

verilog binocular-vision fpga-programming binocular

Updated Apr 16, 2025
Verilog

datacipy / VHDL

Příklady ke knize Data, čipy, procesory

fpga vhdl vhdl-code vhdl-elearning vhdl-examples fpga-programming

Updated Nov 16, 2020
VHDL

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